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面向5G的SCMA系統設計

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面向5G的SCMA系統設計(任務書,開題報告,外文翻譯,論文說明書22000字)
摘要
多址接入是無線通信物理層最核心的技術之一,現有系統采用正交的多址接入方式。正交多址技術由于其接入用戶數與正交資源成正比,因此不能滿足5G大容量、海量連接、低延時接入等需求,非正交多址接入就成為當下5G多址接入的研究重點。SCMA,稀疏碼多址接入,就是應5G需求設計產生的一種非正交多址技術。在發送端通過多維調制和稀疏擴頻將編碼比特映射成SCMA碼字,接收端通過多用戶檢測完成譯碼。相比4G的OFDMA技術,它可以實現在同等資源數量條件下,同時服務更多用戶,從而有效提升系統整體容量。
在接收端,SCMA通過MPA(Message Passing Algorithm),消息傳遞算法進行多用戶檢測。由于需要進行迭代運算,檢測器的時延較大。除此之外,傳統MPA算法中存在大量非線性計算,不利于硬件實現。為了彌補上述缺點,本文首先設計了針對SCMA技術的快速收斂MPA算法和簡化Log-MPA算法,研究了針對SCMA-Turbo的聯合大迭代接收機。為了便于硬件實現,本文還提出了一套完整的量化處理方案。重點通過FPGA實現SCMA上行多接入系統,完成了SCMA編碼和低復雜度譯碼模塊的開發和驗證。
研究結果表明:相對于傳統MPA算法,在保證相同性能的前提下,本文提出的快速收斂MPA算法可以明顯降低迭代次數,從而大幅降低MPA算法復雜度。簡化Log-MPA算法隨著迭代次數的增加可以保證其算法穩定收斂,并且明顯降低了硬件資源開銷。在硬件實現方面,不加噪時可以保證譯碼正確。加入AWGN信道測試BER v.s Eb/N0的性能瀑布曲線,與仿真結果比對,差別小于1dB。
本文的特色:研究內容新穎,系創新性突出,研究全面。對于正在發展的5G事業有重要實踐意義。
關鍵詞:SCMA;MPA算法;5G;FPGA
 
Abstract
Multiple access is one of the most important technologies in the physical layer of wireless communication, and the existing system adopts orthogonal multiple access method. Orthogonal multiple access technology due to the proportional to the number of access users and orthogonal resource, and therefore can’t satisfy the 5g large capacity, massive connection, low latency access requirements, non orthogonal multiple access has become research focus of current 5g multiple access. SCMA, sparse code multiple access, which is a non orthogonal multiple access technology that should be generated by 5G demand design. The coding bits are mapped into SCMA code word by multi dimension modulation and sparse spread spectrum at the transmitter end. Compared to the OFDMA 4G technology, it can be achieved in the same amount of resources under the conditions, while serving more users, so as to effectively enhance the overall capacity of the system.
At the receiving end, SCMA through Message (Passing Algorithm MPA), message passing algorithm for multi-user detection. Due to the need of iterative computation, the delay of the detector is larger. In addition, the traditional MPA algorithm has a large number of nonlinear computation, which is not conducive to the realization of the hardware. In order to make up for these shortcomings, this paper firstly designs a fast convergent MPA algorithm and a simplified Log-MPA algorithm for SCMA technology, and studies the combination of SCMA-Turbo and the large iterative receiver. In order to facilitate hardware implementation, this paper also proposes a complete set of quantitative processing. Focusing on the implementation of SCMA uplink multiple access system, the development and verification of SCMA coding and low complexity decoding module is completed by FPGA.
The research results show that: compared with the traditional MPA algorithm, the fast convergent MPA algorithm can significantly reduce the number of iterations, which significantly reduces the complexity of the MPA algorithm compared to the traditional algorithm. With the increase of the number of iterations, the simplified Log-MPA algorithm can ensure the stability and convergence of the algorithm, and obviously reduce the overhead of hardware resources. In terms of hardware implementation, without noise, can ensure the correct decoding. Join AWGN channel test v.s Eb/N0 BER performance of the waterfall curve, and the simulation results, the difference is less than 1dB.
The characteristics of this paper: the research content is novel, innovative and comprehensive. It is of great practical significance for the development of 5G industry.
Key Words:SCMA;MPA algorithm;5G;FPGA
 
目錄
第1章緒論    1
1.15G技術場景    1
1.25G技術發展現狀    2
1.3SCMA概述及發展現狀    3
1.4SCMA非正交多址接入技術    4
1.4.1SCMA復用    5
1.4.2SCMA接收機    6
1.5 本課題研究內容及預期目標    7
1.6 本章小結    8
第2章 SCMA多用戶檢測算法設計    9
2.1Log-MPA檢測算法    9
2.1.1 轉移概率計算    9
2.1.2 校驗節點更新    9
2.1.3 變量節點更新    13
2.1.4SCMA輸出比特似然比(LLR)計算    13
2.2Max-Log-MPA檢測算法    14
2.3 簡化的Log-MPA(S-Log-MPA)算法    14
2.4 快速收斂MPA(FC-Log-MPA)算法    16
2.4.1 檢驗節點更新    17
2.4.2 變量節點更新    18
2.5SCMA-Turbo大迭代聯合檢測    19
2.6 量化方案    22
2.6.1 對數轉移概率的分布    22
2.6.2 對數似然概率的分布    24
2.6.3 量化區間的確定    25
2.6.4SCMA輸出比特對數似然比量化區間的確定    27
2.7 本章小結    27
第3章仿真與結果分析    29
3.1仿真參數配置    29
3.2SCMA基本算法性能分析    29
3.2.1Log-MPA算法LUT方法性能分析    29
3.2.2Log-MPA算法與Max-Log-MPA算法性能對比    31
3.3SCMA簡化算法性能分析    32
3.3.1快速收斂Log-MPA算法性能分析    32
3.3.2簡化Log-MPA算法性能分析    33
3.4SCMA各檢測算法性能綜合對比分析    33
3.5SCMA-Turbo大迭代性能分析    34
3.6SCMA定點仿真性能分析    36
3.7本章小結    37
第4章硬件仿真與實現    38
4.1系統參數配置和實現環境    38
4.2硬件系統整體框架    39
4.3硬件系統模塊    40
4.3.1PLL時鐘    40
4.3.2隨機信號的產生    40
4.3.3SCMA編碼模塊    41
4.3.4高斯白噪聲的產生    42
4.3.5SCMA譯碼模塊    43
4.4PCI express接口與上位機設計    45
4.4.1FPGA端PCIE設計    45
4.4.2PC端PCIE及上位機設計    46
4.5Modelsim仿真    47
4.5.1仿真環境配置    47
4.5.2偽隨機信號的產生    48
4.5.3SCMA編碼模塊仿真    48
4.5.4AWGN產生模塊仿真    49
4.5.5SCMA譯碼模塊仿真    50
4.5.6SCMA系統仿真    51
4.6實測與結果分析    52
4.7本章小結    54
第5章總結與展望    55
5.1總結    55
5.2展望    55
參考文獻    56
附錄A    58
附A1    58
附A2    59
附A3    59
致謝    60

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